Fabrication of semiconductor integrated circuits usually includes a series of processing steps that may be organized or grouped into different process modules. One process module may be, for example, a patterning process module that includes steps in creating a pattern or patterns of one or more devices on a silicon wafer. For example, this patterning process module may include a lithographic step during which patterns of devices represented by imprints on a photo-mask may be projected, through photo-exposure, onto a photo-sensitive resist (or “photo-resist”) material that is applied on top of a silicon wafer to form patterns. Subsequently, the patterns formed in the photo-resist material may be transferred to an underneath silicon wafer through, for example, an etching process. As is known in the art, patterns on a photo-mask are usually a collection of polygons, whose shapes may be designed based upon final device shapes to be created desirably in the silicon wafer. The polygons on the photo-mask may be made either opaque or transparent to light, depending upon the types (positive or negative) of photo-resist materials being used.
In general, optical systems used in photo-exposure, also known as lithographic exposure, have certain limitations on achievable feature resolution. For example, there is always a limit on the size and density of polygons, in unit area, that may be transferred from a photo-mask to a silicon wafer by an optical system with reasonable satisfaction and acceptable quality. However in recent years, despite steady improvement in optical systems, resolutions of these optical systems have not been able to keep up with the ever increasing demand of manufacturing semiconductor devices of smaller feature sizes on a single silicon wafer. Under this circumstance, as an alternative measure to meet the demand for optical system resolution, the concept of Optical Proximity Correction (OPC) was introduced.
In an ideal world, forms of device shapes manufactured on a photo-mask shall truly reflect those to be created or imprinted on a semiconductor wafer. Nevertheless, the concept of an OPC technique is to manipulate or pre-distort forms of device shapes to be manufactured on the photo-mask, as is well known in the art, such that the pre-distorted shapes imprinted on the photo-mask, when being transferred to a wafer through photo-exposure and etching process, will eventually produce desired device shapes on the wafer. OPC is a software algorithm that takes a set of input design data for a particular lithography step, transforms that input design data by applying a set of pre-determined algorithms and/or models, and finally outputs a new set of design data. This new set of design data is then used in writing or creating patterns in a physical medium such as a photo-mask.
Generally, an OPC process shall produce polygon mask shapes, represented by the new set of design data, which are manufacturable on a semiconductor wafer through existing photo-mask process and/or wafer lithography process. However, the existing photo-mask process and/or wafer lithography process usually also requires a set of stringent conditions to be met by the polygons. These conditions impose certain constrains on the degree of extent that these polygons of mask shapes may be modified during an OPC process. Considering the ever increasing density of polygons being used in masks for manufacturing semiconductor devices, these conditions are becoming harder and harder to be met and satisfied. In the event that an OPC tool encounters a condition such that it can no longer produce polygons that meet the required manufacturability, one possible outcome of the OPC tool is to produce a “best possible” solution that is not necessarily acceptable by the pre-set manufacturing quality requirement.
Traditionally, OPC tools have used techniques to modify polygons for desired device shapes according to certain simplified rules. For example, polygons edges may be first broken into several segments that are allowed to move or to be adjusted in fixed directions of “in” or “out” of polygons. Subsequently, optical simulation is performed on the pattern to calculate edge placement error that may be anticipated on the wafer. Based upon the edge placement error, one or more segments may be further moved in a translational movement in a direction that may compensate or reduce that edge placement error. For example, OPC may make translational movement of the segment such that the moved or adjusted segment remains parallel to the original segment. More specifically, if an original mask design contains polygons with only 90° or 270° vertices, then the mask shape designed and finally output by OPC after including the effect of segment movement will still be polygons and with only 90° or 270° vertices as well. On the other hand, if the original mask design, which is fed into an OPC process as input design data, has segments of 45° orientation, then these segments of 45° orientation will retain the same orientation in the final mask design output by OPC. The extent that a segment may move is pre-determined, as is known in the art, by models used in the OPC.